1. Field of the Invention
This invention relates to an optical semiconductor device and, more particularly, to one in which a light emitting element and a photodetector are integrated on a single semiconductor substrate.
2. Description of the Prior Art
Various optical semiconductor devices combining a light emitting element and a photodetector have been reported. For example, IEEE Trans. Electron Devices, vol. ED-31, No. 6,805(1984) discloses an optical semiconductor device in which a single double-heterojunction light emitting diode used as a light emitting element is integrated on the collector of a single heterojunction phototransistor used as a photodetector.
However, in the conventional optical semiconductor device referred to above, since the photodetection side merely behaves as its positive input (on-input), it is impossible to realize both positive input and negative inputs (off-input).
On the other hand, recently, there has been a proposal to realize an optical memory by using an optical semiconductor device.
For example, in 1989 Spring National Meeting of Society of Electronics, Information and Telecommunication, Digest of Lecture C-412, p. 4-201, there is proposed an optical parallel memory in which a memory cell is made by connecting in series a single heterojunction phototransistor used as a photodetector and a single light emitting diode used as a light emitting element.
In 1990 Spring National Meeting of Society of Electronics, Information and Telecommunication, Digest of Lecture C-176, p. 4-231, there is proposed an optical erasure type optical parallel memory in which a memory cell is made by connecting in series a single heterojunction phototransistor used as a photodetector and a single light emitting diode used as a light emitting element and by connecting another heterojunction phototransistor used as a photodetector for reset in parallel with the former heterojunction phototransistor and the light emitting diode.
In the conventional optical parallel memory referred to above, setting by light, i.e. writing, is possible by turning on the heterojunction phototransistor in response to a light input and by turning on the light emitting diode. However, resetting, i.e. erasure, is not possible unless the power source is turned off.
In the conventional optical erasure type optical parallel memory referred to above, erasure by light is possible without turning off the power source due to the use of the heterojunction phototransistor for reset. This, however, has a structure in which the light emitting diode used as a light emitting element overlies the heterojunction phototransistor used as a photodetector, and make parallel division of the photodetection portion difficult. Additionally, the optical erasure type optical parallel memory uses a memory cell having a structure in which two phototransistors are connected in parallel with each other to one of terminals of a single light emitting element, which is essentially different in circuit arrangement from memory cells in optical semiconductor devices according to the present invention.